Improvement of Post-Fault Performance of a Cascaded H-bridge Multilevel Inverter
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Date
2017-04
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Idioma
en
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Institute of Electrical and Electronics Engineers Inc.
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ATRIBUCIÓN 4.0 INTERNACIONAL
CC BY 4.0
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https://creativecommons.org/licenses/by/4.0/deed.es
Abstract
This paper is focused on improving the post-fault performance of cascaded H-bridge multilevel inverters by decreasing the common-mode voltage. First, an algorithm is proposed to determine the optimal post-fault state among all possible states, which have the same maximum available voltage. Furthermore, a modified technique is proposed to calculate the references of inverter phase voltages under faulty conditions. This technique leads to a decrease in the common-mode voltage when the required output voltage is less than its maximum value. These solutions are mutually employed in the post-fault control system. Simulation and experimental results confirm the effectiveness of the proposed solutions in comparison with the existing methods in different cases. © 2017 IEEE.
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Indexación: Scopus
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Citation
IEEE Transactions on Industrial Electronics Volume 64, Issue 4, Pages 2779 - 2788April 2017 Article number 7752965
DOI
10.1109/TIE.2016.2632058