Ouni, SaeedZolghadri, Mohammad RezaKhodabandeh, MasihShahbazi, MahmoudRodríguez, JoseOraee, HashemLezana, PabloSchmeisser, Andres Ulloa2024-06-252024-06-252017-04IEEE Transactions on Industrial Electronics Volume 64, Issue 4, Pages 2779 - 2788April 2017 Article number 77529650278-0046https://repositorio.unab.cl/handle/ria/57964Indexación: ScopusThis paper is focused on improving the post-fault performance of cascaded H-bridge multilevel inverters by decreasing the common-mode voltage. First, an algorithm is proposed to determine the optimal post-fault state among all possible states, which have the same maximum available voltage. Furthermore, a modified technique is proposed to calculate the references of inverter phase voltages under faulty conditions. This technique leads to a decrease in the common-mode voltage when the required output voltage is less than its maximum value. These solutions are mutually employed in the post-fault control system. Simulation and experimental results confirm the effectiveness of the proposed solutions in comparison with the existing methods in different cases. © 2017 IEEE.enImprovement of Post-Fault Performance of a Cascaded H-bridge Multilevel InverterArtículoATRIBUCIÓN 4.0 INTERNACIONAL CC BY 4.0 Deed10.1109/TIE.2016.2632058