Improvement of Post-Fault Performance of a Cascaded H-bridge Multilevel Inverter

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dc.contributor.authorOuni, Saeed
dc.contributor.authorZolghadri, Mohammad Reza
dc.contributor.authorKhodabandeh, Masih
dc.contributor.authorShahbazi, Mahmoud
dc.contributor.authorRodríguez, Jose
dc.contributor.authorOraee, Hashem
dc.contributor.authorLezana, Pablo
dc.contributor.authorSchmeisser, Andres Ulloa
dc.date.accessioned2024-06-25T16:04:27Z
dc.date.available2024-06-25T16:04:27Z
dc.date.issued2017-04
dc.descriptionIndexación: Scopus
dc.description.abstractThis paper is focused on improving the post-fault performance of cascaded H-bridge multilevel inverters by decreasing the common-mode voltage. First, an algorithm is proposed to determine the optimal post-fault state among all possible states, which have the same maximum available voltage. Furthermore, a modified technique is proposed to calculate the references of inverter phase voltages under faulty conditions. This technique leads to a decrease in the common-mode voltage when the required output voltage is less than its maximum value. These solutions are mutually employed in the post-fault control system. Simulation and experimental results confirm the effectiveness of the proposed solutions in comparison with the existing methods in different cases. © 2017 IEEE.
dc.description.urihttps://ieeexplore-ieee-org.recursosbiblioteca.unab.cl/document/7752965
dc.identifier.citationIEEE Transactions on Industrial Electronics Volume 64, Issue 4, Pages 2779 - 2788April 2017 Article number 7752965
dc.identifier.doi10.1109/TIE.2016.2632058
dc.identifier.issn0278-0046
dc.identifier.urihttps://repositorio.unab.cl/handle/ria/57964
dc.language.isoen
dc.publisherInstitute of Electrical and Electronics Engineers Inc.
dc.rights.licenseATRIBUCIÓN 4.0 INTERNACIONAL CC BY 4.0 Deed
dc.rights.urihttps://creativecommons.org/licenses/by/4.0/deed.es
dc.titleImprovement of Post-Fault Performance of a Cascaded H-bridge Multilevel Inverter
dc.typeArtículo
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